ChipNexus™, a developer of agentic AI software for semiconductor and hardware design, today announced the availability of the NEX™ Analog Agent, which brings analog design capabilities to NEX™, its multi-agent engineering platform. The Analog Agent works directly with Cadence Virtuoso, Spectre simulation and Siemens Calibre physical verification, using the EDA licenses and process design kits (PDKs) customers already have installed.

Analog and mixed-signal design remains one of the most manual stages of chip development, relying on experienced engineers to iterate across schematic, simulation, layout and verification tools. NEX platform brings those steps into one agent-driven workflow. The Analog Agent coordinates project setup, schematic work, layout, simulation, physical verification and reporting, delegating each stage to a specialized Virtuoso sub-agent with defined tools and acceptance criteria.

With the Analog Agent, engineers can direct the NEX™ platform to:

  • Read and edit Virtuoso schematics and layouts, and inspect libraries, technology data, symbol pins and device parameters

  • Export netlists, run Spectre simulations and interpret the results

  • Run Calibre design rule checks (DRC) and layout-versus-schematic (LVS) checks

  • Import and export GDS layout data and compare layouts against a reference

For example, the Analog Agent can inspect a circuit, make a scoped schematic change, simulate it and report the measured results before moving on to layout.

Customer results. At a leading semiconductor customer, analog and RF engineers used the NEX™ Analog Agent to run device-characterization flows, from netlist and simulation-parameter generation through frequency sweeps and plots, across five topologies. The customer’s RF engineer validated a 10+ GHz designs across three process technologies with agent setting up the environment, executing sweeps and analyzing results in one to two hours for each process node.

Results grounded in tool evidence. Analog Agent stage reports distinguish work that succeeded, work that ran but missed its acceptance criteria, and work that could not run. A DRC run with violations or an LVS mismatch is reported as incomplete and returned for repair, not presented as done. The Analog Agent checks device operating points and reports performance alongside process corner, temperature, supply and load conditions, so engineers can see exactly what was verified and what remains.

Engineering muscle memory. The Analog Agent also introduces persistent error memory. When the NEX™ platform fixes a recurring problem, such as a required module load, a tool-specific flag or a shell quirk, it records the verified resolution and applies it in later sessions in the same repository, including across Git worktrees. Engineers can review, update or disable these entries at any time.

“Analog design is where engineering judgment matters most, so an AI agent there has to show its work,” said Dan Elmhurst, CEO of ChipNexus™. “The NEX Analog Agent runs on the Virtuoso, Spectre and Calibre flows our customers already trust, and it reports every result against the tool’s own evidence. It is available to teams today, not on a roadmap.”

Availability

The NEX Analog Agent is available now. It runs on Linux with customer-installed EDA tools, licenses and PDKs. NEX supports private-cloud and on-premises deployment. Demos can be requested at https://chipnexus.ai.

About ChipNexus

ChipNexus™ (formerly Primis AI) builds agentic AI software for semiconductor and hardware design teams. Its flagship product, NEX™, is a multi-agent automation framework that helps engineers move faster from architecture through physical design, integrating with leading commercial and open-source EDA tools. ChipNexus™ is headquartered in Salt Lake City, Utah. For more information, visit https://chipnexus.ai.

Cadence, Virtuoso and Spectre are trademarks or registered trademarks of Cadence Design Systems, Inc. Calibre is a trademark or registered trademark of Siemens Industry Software Inc. NEX™ and ChipNexus™ are trademarks of Primis Inc. (dba ChipNexus™). ChipNexus™ is not affiliated with, endorsed by, or sponsored by Cadence or Siemens. All other trademarks are the property of their respective owners.

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